By supporting AVX-512, this ties AMD to substantial engineering costs and package space requirements. Further, AVX-512 uptake has not been as strong as Intel would have liked, so it’s curious to see AMD implement it.

I therefore wonder if this is a defensive play against oneAPI and if AMD looks to have their own equivalent that spans compute, GPU and Xilinx. This would be a huge commit by AMD but I’m not sure why else they would announce and implement support for these instructions.

Either way, this is great for the end-user, as AVX-512 is fantastic when the hardware and workload supports it.