Comments on: Silicom M20E3ISLB is Intel QuickAssist PCH for a 2.5in U.2 Drive Tray

By: Bellhart

Bellhart — Sun, 10 Jul 2022 03:07:31 +0000

These devices are fantastic and we have several of them (any 100s of other Silicom PCIe QAT devices) but the specific issue not covered in this article and likely because it was never physically in the hands of the person writing the article is the mechanics of the device. This U.2 device has mounting screws on the bottom of the device and that may not seem like much of a deal but short of Supermicro SAS/SATA drive trays and a PCIe JBOF from serialcables.com no other vendor offer NVMe drive trays that are compatible (HPe/Lenovo/Dell we’ve tried). We have worked with Silicom to address this but as of yet there are no variations with mounting screws on the sides like most/all other NVMe U.2 devices use. Seriously though; great form factor for a great chip and as far as I know globally unique.

By: molli123

molli123 — Mon, 04 Jul 2022 09:56:46 +0000

in the table it should be RSA Decrypt 2k-bit 100k Ops/Sec, not 100 Ops/Sec.

By: Nils

Nils — Mon, 04 Jul 2022 04:52:51 +0000

Or one could put it in a ThunderBolt enclosure to use with a Laptop 😉

I’m wondering what the use-case is, encryption / compression for either disk writes or network is going to be seriously hamstrung by the PCIe bandwidth. Is it possible to use this to encrypt data and the devices DMAs to an NVMe disk without going through the CPU?

By: Malvineous

Malvineous — Sat, 02 Jul 2022 05:43:05 +0000

I can see this being quite useful for storage, having an SSD-based ZFS system where enabling encryption tanked the performance, because the CPUs couldn’t keep up with encryption at the bandwidth the SSDs could write at.

I suppose the only issue there is that if your SSDs are already maxing out multiple PCIe lanes, then funnelling all the traffic through a PCIe x4 connector to do the encryption will still be somewhat of a bottleneck.

By: Zibi

Zibi — Sat, 02 Jul 2022 04:47:04 +0000

Quite interesting thing. Lots of telcos that are standardizing around 1U commodity servers might be interested in checking this over.
There are very few servers that are equipped with QAT enabled LB chipset, and in 1U most of the PCIe slots are utilized by NICs anyway. This U2 accelerator might be something that is godsend for such niche.
Regarding the systems – there is a Intel O-RAN framework https://www.intel.com/content/www/us/en/communications/virtualizing-radio-access-network.html

By: TS

TS — Sat, 02 Jul 2022 04:16:28 +0000

Very Cool. Does this work on EPYC Servers?

In Linux, the driver would probably see it hanging off of 4x of EPYC’s PCIe lanes and the code path would probably enable Cryptography offloading and pfsense acceleration, etc.