Comments on: Intel 12th Gen Core Alder Lake Details at Intel Innovation 2021

By: Bob Niland

Bob Niland — Sat, 30 Oct 2021 16:20:01 +0000

re: … benchmarks will follow at a later date …

I take this Intel embargo to mean: entirely ignore these not-really-a-launch slides (which are free of any real technical detail), and wait for the benches from non-NDA sites who test with production sand.

By: ssnseawolf

ssnseawolf — Thu, 28 Oct 2021 15:52:38 +0000

I’m confused on why PCIe lanes would not be validated for networking. A PCIe lane is a PCIe, isn’t it? Since it’s agnostic to the data it transports, why would Intel make a distinction as to how the lanes can be used? Is it a retimer/latency thing?

By: Nils

Nils — Thu, 28 Oct 2021 10:26:44 +0000

This is also the first time in a long while that Intel released the Desktop product first for a new architecture.

By: Nils

Nils — Thu, 28 Oct 2021 06:37:04 +0000

Exciting how they upped the PCIe game, especially with more connectivity through the PCH. PCIe 5 is probably overkill at this moment but in the future might allow more cards with fewer lanes. I’d be very interested in a Xeon based on this.

One potential problem I see is that storage speed is constrained by encryption performance in the CPU – on my Tiger Lake Laptop it tops out at ~5GB/s per Core for AES-XTS with 256bit key. That’s where an accelerator could shine since a lot of CPU time is spent on encryption these days.

By: BadCo.

BadCo. — Wed, 27 Oct 2021 20:12:05 +0000

Still only 16x PCIe lanes? Hard pass.

By: KarelG

KarelG — Wed, 27 Oct 2021 16:45:35 +0000

Cool! So now, let’s wait and see ADL derived Xeons E-24xx and then next years SR for server and smaller workstation. Intel seems to finally catch some wind…